A storage device that includes non-volatile memory may include a portion of the non-volatile memory that is designated as intermediate storage (IS) memory and another portion of the non-volatile memory that is designated as main storage (MS) memory. The IS memory may be used in storage devices to provide for faster write throughput, and may also be used as a safe-zone to quickly store host data prior to storing the host data in the MS. The IS memory may also function as a non-volatile memory cache that enables hot data stored within the IS memory to be accessed very quickly. The IS memory could also be referred to as a cache.
The IS memory may have a lower storage density than the MS memory. The IS memory may be more expensive per bit than the MS memory. The IS memory may have greater endurance than the MS memory. In some architectures, the total storage capacity of the IS memory may be significantly less than the MS memory. For example, the more expensive IS memory might take up less than ten percent of a total storage budget of a storage device.
As one example, IS memory can include single-level cell (SLC) memory wherein a single bit of data is stored per memory cell. The SLC memory can be flash memory cells. The IS memory can alternatively, or additionally, include storage class memory (SCM). Examples of SCM in this context are ReRAM, Phase-Change Memory (PCM), or Magnetic RAM. By contrast, the less expensive MS memory, which will likely take up more than ninety percent of the total storage budget, can include multi-level cell (MLC) memory wherein two or more bits are stored per memory cell. The MLC memory can be flash memory cells. MLC memory, as the term is being used herein, can include memory cells wherein two, three or four bits of data, or potentially even more than four bits of data, are being stored per memory cell. Accordingly, as the term is being used herein, the term MLC memory also encompasses triple-level cell (TLC) memory and quad-level cell (QLC) memory.
Note that since the IS memory may have lower write latencies than the MS memory, host data may initially be written to the IS memory. However, due to the limited storage capacity of the IS memory, host data is typically relocated from IS memory to MS memory to free up space in the IS memory. The process of transferring data from the IS memory to the MS memory is called “relocation.” Conventional techniques for performing relocation are typically based on simple heuristics, such as first-in first-out (FIFO), or based on an aging algorithm.